Advance Information

132 x 132 x 3 18bit RGB LTPS Source Driver
for Active Matrix OLED

This SSD2383 is used for driving a LTPS PLED/OLED dot matrix panel for a mobile phone application with a resolution up to 132RGB x 132 and 262k colors. 

It has 132 source outputs multiplexed by three (RGB), source control and gate control signals for driving on glass 3:1 de-multiplexer and gate driver. 

The integrated full DDRAM has a capacity of 313,632 bits (132 pixels x 18 bits x 132 lines). The display data are received via an 18/16/9/8 bit parallel CPU interface or a 3/4 wire serial CPU interface.

• Single chip low power LTPS OLED driver with integrated source driver, gate controller, display RAM and timing controller.

• Outputs: 

  • V132 source outputs with RGB multiplexing (1:3)

  • RGB clock output signals for on glass de-multiplexer

  • Gate control output signals for on glass gate driver

  • Common cathode switch control signal

  • Controlling signals for power companion chip

  • Synchronization signal indicating scanned line

• Graphics:

  • Maximum addressable graphics size is 132RGB*132

  • Full color mode 262k colors (18 bit 6R:6G:6B)

  • 65k color mode (16 bit 5R:6G:5B) 

  • Reduced color mode with LUT use: 

    • 4k colors (12 bit 4R:4G:4B) 

    • 256 colors (8 bit 3R:3G:2B) 

  • Idle mode for power saving

• Driving algorithm:

  • Voltage drive, RGB multiplexed

  • Display on after addressing LTPS

• Interfaces:

  • 18, 16, 9 or 8-bit parallel CPU interface (8080 and 6800), 13.5 MHz

  • 3 or 4 wire serial interface, 13.5 MHz 

  • Synchronization line to avoid tearing effects

• Display features:

  • Full DDRAM 132*18(6R6G6B)*132 

  • 4 selectable electro-optical transfer functions (Gamma) 

  • Maximum and minimum level adjustable per color 

  • Integrated temperature compensation 

  • Programmable frame frequency between 51 to 100 Hz with 7Hz steps

• On chip:

  • Oscillator and timing controller

  • Gate controller

  • Adjusted black level with additional standby default

  • Charge pump for LTPS supply voltage VDDPS

  • OTP memory to store initialization register settings

• Input power supply

  • Digital supply voltage range V_DDD to V_SSD: 1.65 V to 3.0 V

  • Analog supply voltage range V_DDA to V_SSA: 2.3 V to 3.3 V

  • Digital and analog supply voltage relationship: V_DDD <V_DDA

• Internally generated supplies (may also be supplied externally)

  • Digital core supply voltage range VDD to VSS: 2.3 V to 2.6 V

  • LTPS supply voltage range VDDPS to VSSPS: 4.6 V to 5.2 V

• Slim chip layout, suitable for Chip On Glass (COG) or Chip on Foil (COF). 

• CMOS compatible inputs. 

• Operating temperature range -40°C to 85°C. 

• Au pads with segment pins in 60um pitch, I/O pins in 65µm pitch.