Advance Information

675KB Embedded Display SRAM LCD Display Controller

SSD1961 is a display controller of 5,529,600 bit frame buffer to support up to 640 x 480 x 18bit graphics content. It also equips parallel MCU interfaces in different bus width to receive graphics data and command from MCU. Its display interface supports common RAM-less LCD driver of color depth up to 18 bit-per-pixel.

• Display feature

  • 675kbyte (5,529,600bit) built-in frame buffer. Support up to 640 x 480 at 18bpp display

  • Support TFT 18 bit generic RGB interface panel

  • Support 8-bit serial RGB interface

  • Hardware rotation of 0, 90, 180, 270 degree

  • Hardware display mirroring

  • Hardware windowing

  • Programmable brightness, contrast and saturation control

  • Dynamic Backlight Control (DBC) via PWM signal

• MCU connectivity

  • 8/9/16/18-bit MCU interface

  • Tearing effect signal

• I/O Connectivity

  • 4 GPIO pins
• Built-in clock generator
• Deep sleep mode for power saving
• 64 pin BGA package
• Core supply power (V_DDPLL and V_DDD): 1.2V±0.1V
• I/O supply power (V_DDIO): 1.65V to 3.6V
• LCD interface supply power (V_DDLCD): 1.65V to 3.6V